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Over-Voltage Failure Modes, ESD protection diode damage – Caused by applying >Vdd (+0.7 Volts), or Vss (-0.7 Volts) to IC pins
– Reverse biased ESD junctions can avalanche and fail – Forward biased ESD diodes can thermally fail – Metal to or from protection circuits can fail from Joule heating – Stressed ESD protection devices may allow the device to prematurely fail in the field. Joule Heating Induced Failures, Well understood in the industry, backdrive induced – UK MOD DEF 00-53 / Issue 2. • Violation of current density design rules in metal, or bond wires, beyond adiabatic limits – Conductors can deform, weaken, or fuse – Key factors include total chip backdrive current and time. Over-Voltage Stress During ICT: Shared Logic Level Assignments. • Conventional testers use group or shared logic level assignments • Driver A and B are forced to use the same logic level assignments • Satisfying voltage requirements for U2 causes U1 to be exposed to over-voltage condition and possible damage. Inaccurate, High Impedance Drivers Can Cause Over-Voltage Stress, • Driver A must be programmed above 3.3V to accommodate backdrive IR drops. • An open on the output of U1 forces an over voltage condition on the input of U2.
Tags : logic level, failure modes, protection circuits, level assignments, bond wires, current density, mod def, voltage devices, voltage requirements, circuit test, uk mod, 3v, conductors, low voltage, volts
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